Variable-length decoding apparatus and decoding method

ABSTRACT

Encoded data using reversible variable length code words is input to a forward decoder ( 123 ) to be decoded in the forward direction. When an error is detected in the encoded data in the forward decode processing, backward decode processing is started by a backward decoder ( 126 ). A decode value determination unit ( 125 ) determines a decode value by using the forward and backward decode results and the error detection positions in the encoded data in units of bits and syntax which are respectively detected in the forward decoding and the backward decoding.

The present application is a continuation of U.S. application Ser. No. 09/319,160, filed Jun. 2, 1999 now U.S. Pat. No. 6,829,299, the entire contents of which are incorporated herein by reference.

TECHNICAL FIELD

The present invention relates to a variable-length decoding apparatus for decoding encoded data formed from a variable length code used for compression encoding of, e.g., a video signal, and a decoding method.

BACKGROUND ART

A variable length code is a code system for generating a code having a short average code length by respectively assigning a code having a short code length to a frequently occurring symbol and a code having a long code length to a rarely occurring symbol on the basis of the frequencies of occurrence of symbols. By using variable length codes, therefore, the amount of data can be greatly compressed as compared with the data before encoding. For this reason, variable length codes are widely used as codes for information compression.

In a video encoding system as well, variable length codes are used for a general standard scheme such as MPEG1, MPEG2, H.261, or H.263.

A general problem associated with variable length codes is that when an error is mixed in encoded data due to a channel error or the like, the encoded data mixed with the error cannot be properly decoded by a decoding apparatus owing to the influences of the error. In order to prevent this problem, when an error can occur in a transmission channel, a method of preventing the propagation of an error by inserting sync codes in data at given intervals is generally used. A bit pattern that does not appear by any combination of variable length codes is assigned to a sync code. According to this method, even if an error occurs in encoded data and the data cannot be decoded, the propagation of the error can be prevented by resuming decoding upon detection of the next sync code, thereby continuing the decoding.

Even with the use of sync codes, however, decoding cannot be performed for encoded data between the position where an error has occurred and decoding cannot be performed and the position where the next sync code is detected.

A variable-length decoding/encoding apparatus which can reduce the portion, which cannot be decoded, by using variable length codes that can be decoded bidirectionally, i.e, forward and backward and performing backward decoding upon detection of a next sync code, has been proposed in the patent application (Japanese Patent Application Nos. 7-260383 and 9-81614) filed by the present applicant.

Even with such a variable-length encoding/decoding apparatus, an error in encoded data can be detected only when, for example, a bit pattern that is not used as a code word of a variable-length code appears. For this reason, in some case, an error is detected at a succeeding position considerably away from the position where the error is actually mixed in the data. This is because a bit pattern that is not used as a code word of a variable length code does not always appear at the position where the error is actually mixed in the data, and decode processing is continuously performed as long as a corresponding portion is present in the bit patterns used as the code words of the variable length code. As a result, an incorrect word code is erroneously decoded as a correct code word.

Various methods have been examined as counter-measures against channel errors in a video encoding/decoding apparatus. For example, several methods as countermeasures against channel errors are disclosed in a literature (Hideo Kuroda, “Image Coding Technique”, Shokodo, 1996). Of these methods, error concealment is introduced as a technique used on the decoder side. Error concealment is a technique of minimizing the influences of an error on a frame by using motion vectors on the peripheral portion of the frame upon occurrence of a loss of encoded data.

If, however, an incorrect code word is decoded as a correct code word, a technique of minimizing the influences of an error, such as the above error concealment, cannot be used. As a result, the frame is affected by the error.

The influences of an error in the INTRA mode (intraframe encoding mode) are larger than those in the INTER mode (interframe encoding mode), and a block in unnatural color appears on a frame.

As described above, in the conventional variable-length decoding apparatus, when a variable length code is decoded, an incorrect code word may be decoded as a correct word. If, therefore, this apparatus is applied to decoding of a variable length encoded video signal, a frame is affected by an error.

It is an object of the present invention to provide a variable-length decoding apparatus and a decoding method which can decrease the possibility that an incorrect code word is erroneously decoded as a correct word, and can realize sufficient resistance to errors.

DISCLOSURE OF INVENTION

According to the present invention, there is provided a variable-length decoding apparatus comprising an input unit for receiving encoded data formed from a variable length code made up of code words that can be decoded in both a forward direction and a backward direction, a forward decoder for decoding the encoded data in the forward direction, a backward decoder for decoding the encoded data in the backward direction, and a decode value determination unit for outputting a final decode result from decode results respectively obtained by the forward decoder and the backward decoder, wherein each of the forward and backward decoders includes a detection unit for detecting an error in the encoded data, and the decode value determination unit determines a decode value by using error detection positions in the encoded data in units of bits and syntax, which are detected by the forward decoder and indicate an error position in the encoded data, and error detection positions in the encoded data in units of bits and syntax, which are detected by the backward decoder and indicate an error position in the encoded data.

In this variable-length decoding apparatus, when errors are detected by the forward and backward decoders, the decode value determination unit is notified of the error detection positions as two types of position information, i.e., positions in units of bits and positions in units of syntax. The true error position can therefore be checked doubly on the basis of the error detection positions in units of bits and the error detection positions in units of syntax. This allows the use of only decode results corresponding to correct code words with a considerably high probability, and hence can decreases the possibility of erroneously decoding an incorrect code word as a correct code word.

In addition, the decode value determination unit preferably uses a decode value determination method of,

(a) using a forward decode result as a decode value for code words up to a position a predetermined amount before the error detection position in units of bit or syntax, which is obtained by the forward decoder, and a backward decode result as a decode value for code words from a position a predetermined amount after the error detection position in units of bits or syntax, which is obtained by the backward decoder, and discarding the remaining encoded data, when the error detection positions obtained by the forward and backward decoders do not cross each other in units of both bits and syntax,

(b) using a forward decode result as a decode value for code words up to a position immediately before the error detection position in units of syntax, which is obtained by the backward decoder, and a backward decode result as a decode value for code words from a position immediately after the error detection position in units of syntax, which is obtained by the forward decoder, and discarding encoded data of a portion on which the error detection positions in units of syntax cross each other, when the error detection positions obtained by the forward and backward decoders do not cross each other in units of bits but cross each other in units of syntax,

(c) using a forward decode result as a decode value for code words up to a position immediately before the error detection position in units of bits, which is obtained by the backward decoder, and a backward decode result as a decode value for code words from a position immediately after the error detection position in units of bits, which is obtained by the forward decoder, and discarding encoded data of a portion on which the error detection positions in units of bits cross each other, when the error detection positions obtained by the forward and backward decoders cross each other in units of bits but do not cross each other in units of syntax, and

(d) selecting a position where a crossing portion becomes largest as an error detection position,

using a forward decode result as a decode value for code words up to a position immediately before the error detection position obtained by the backward decoder and a backward decode result as a decode value for code words from a position immediately after the error detection position obtained by the forward decoder, and discarding encoded data of a portion on which the error detection positions cross each other, when the error detection positions obtained by the forward and backward decoders cross each other in units of both bits and syntax.

Considering that an error detection position in a variable length code succeeds considerably away from the actual error position, in the case (a) in which the error detection positions do not cross each other in both the forward and backward directions, code words up to a position set by retracting the encoded data by a predetermined amount from each error detection position are used. In the cases (b) to (d) in which the error detection positions in the forward or backward direction cross each other somehow, a portion having a large crossing range is discarded to effectively prevent an incorrect portion from being erroneously determined as a correct portion.

Furthermore, according to the present invention, there is provided a video decoding apparatus comprising an input unit for receiving encoded data of a video signal containing a variable length code generated by encoding transform coefficients obtained by orthogonal transformation of the video signal by using code words that can be decoded in both a forward direction and a backward direction, a sync section detection unit for detecting a sync section of the encoded data, a forward decoder for decoding encoded data in the forward direction in a predetermined sync section detected by the sync section detection unit, a backward decoder for decoding encoded data in the backward direction in a predetermined sync section detected by the sync section detection unit, and a decode value determination unit for outputting a final decode result from decode results obtained by the forward and backward decoders, wherein each of the forward and backward decoders includes an error detection unit for detecting an error in the encoded data, and the decode value determination unit determines a decode value by using error detection positions in the decoded data in units of bits and syntax which indicate an error position in the encoded data which is detected by the forward decoder, and error detection positions in the decoded data in units of bits and syntax which indicate an error position in the encoded data which is detected by the backward decoder.

In general, owing to the characteristics of a video encoding scheme, to determine an incorrect portion as a correct portion influences the display frame more than to discard a correct portion. Therefore, by performing a double check based on error detection positions in units of bits and syntax, the influences exerted in the display frame when an incorrect portion is determined as a correction can be greatly reduced.

The decode value determination unit in this video decoding apparatus preferably uses a decode value determination method of,

(a) using a forward decode result as a decode value for macroblocks up to a position a predetermined amount before the error detection position in units of bit or syntax, which is obtained by the forward decoder, and a backward decode result as a decode value for macroblocks from a position a predetermined amount after the error detection position in units of bits or syntax, which is obtained by the backward decoder, and discarding encoded data composed of transform coefficients of the remaining macroblocks, when the error detection positions obtained by the forward and backward decoders do not cross each other as both positions in units of bits and syntax,

(b) using a forward decode result as a decode value for macroblocks up to a position immediately before the error detection position in units of syntax, which is obtained by the backward decoder, and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position in units of syntax, which is obtained by the forward decoder, and discarding encoded data composed of transform coefficients of a macroblock on which the error detection positions in units of syntax cross each other, when the error detection positions obtained by the forward and backward decoders do not cross each other as positions in units of bits but cross each other as positions in units of syntax,

(c) using a forward decode result as a decode value for macroblocks up to a position immediately before the error detection position in units of bits, which is obtained by the backward decoder, and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position in units of bits, which is obtained by the forward decoder, and discarding encoded data composed of transform coefficients of a macroblock on which the error detection positions in units of bits cross each other, when the error detection positions obtained by the forward and backward decoders cross each other as positions in units of bits but do not cross each other as positions in units of syntax, and

(d) selecting a position where a crossing portion becomes largest as an error detection position,

using a forward decode result as a decode value for macroblocks up to a position immediately before the error detection position obtained by the backward decoder and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position obtained by the forward decoder, and discarding encoded data composed of transform coefficients of a macroblock on which the error detection positions cross each other, when the error detection positions obtained by the forward and backward decoders cross each other as both positions in units of bits and syntax.

Considering that an error detection position in a variable length code succeeds considerably away from the actual error position, in the case (a) in which the error detection positions do not cross each other in both the forward and backward directions, macroblocks up to a position set by retracting the encoded data by a predetermined amount from each error detection position are used. In the cases (b) to (d) in which the error detection positions in the forward or backward direction cross each other somehow, a portion having a large crossing range is discarded to prevent the influences of determination of an incorrect portion as a correct portion in the display frame.

When an error is detected in the encoded data in the sync section, the decode value determination unit discards part or all of encoded data composed of macroblock transform coefficients having undergone intraframe encoding within a macroblock in which no error has been detected.

In the intraframe encoding mode, the occurrence of an error greatly influences a frame. More specifically, display of wrong coefficients causes a phenomenon in which a block in unnatural color appears in a frame. If, therefore, at least the occurrence of an error in a sync section is known, the influences of the error on the frame can be reduced by discarding macroblocks in the intraframe encoding mode.

In addition, the decode value determination unit displays a previous frame for a macroblock from which encoded data is discarded or processes the macroblock in a mode without encoding when an intraframe encoding mode is set, and performs motion compensation when an interframe prediction encoding mode is set.

In the intraframe encoding mode, when a DCT coefficient is discarded, since no motion vector is present, a previous frame is displayed, or data is processed in a mode without encoding. In the interframe encoding mode, since a motion vector on the upper layer is present, a considerably natural image can be generated by performing motion compensation using this vector without any DCT coefficient. That is, a DCT coefficient belongs to the lower layer, and a motion vector belongs to the upper layer. If, therefore, an upper motion vector is available, an image can be generated without using any lower DCT coefficient.

Furthermore, according to the present invention, there is provided a variable-length decoding apparatus comprising an input unit for receiving encoded data formed from a variable length code made up of code words including code words that can be decoded in both a forward direction and a backward direction, a forward decoder for decoding the encoded data in the forward direction, a backward decoder for decoding the encoded data in the backward direction, and a decode value determination unit for outputting a final decode result from decode results respectively obtained by the forward decoder and the backward decoder, wherein each of the forward and backward decoders includes a detection unit for detecting an error in the encoded data, and the decode value determination unit estimates a range in which an error is present on the basis of error detection positions detected in the encoded data by the forward and backward decoders, an error rate in a transmission system or storage system, an occurrence probability of each code word, and a bit pattern of each code word in a code word table, thereby determining a final decode value.

In this variable-length decoding apparatus, the probability that an incorrect code word is erroneously decoded as a correct code word can be decreased to a predetermined probability or less by estimating the actual positions of errors from error detection positions in terms of probability in accordance with the error rate in the transmission system or storage system and the performance of code words.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a view for explaining a first method of forming the code words of a reversible code.

FIGS. 2A and 2B are views respectively showing a forward code tree and a backward code tree.

FIG. 3 is a view for explaining a second method of forming the code words of a reversible code.

FIG. 4 is a view for explaining a third method of forming the code words of a reversible code.

FIG. 5 is a block diagram showing the arrangement of an encoding/decoding system using a variable-length encoding apparatus according to the first embodiment of the present invention.

FIGS. 6A and 6B are views showing a syntax for the encoded data used by the variable-length decoding apparatus according to the first embodiment.

FIGS. 7A and 7B are views for explaining the principle of a first decode value determination method in the variable-length decoding apparatus according to the first embodiment.

FIGS. 8A and 8B are views for explaining the principle of a second decode value determination method in the variable-length decoding apparatus according to the first embodiment.

FIG. 9 is a flow chart for explaining a procedure for a decode value determination method in the variable-length decoding apparatus according to the first embodiment.

FIG. 10 is a block diagram showing the arrangement of a video encoding/decoding system using a video decoding apparatus according to the second embodiment of the present invention.

FIG. 11 is a block diagram showing the arrangement of the video demultiplexer of the video decoding apparatus according to the second embodiment.

FIGS. 12A and 12B are views showing a syntax for the encoded data used in the video decoding apparatus according to the second embodiment.

FIG. 13 is a block diagram showing the arrangement of a lower layer variable-length decoding apparatus arranged in the video decoding apparatus according to the second embodiment.

FIG. 14 is a block diagram showing the arrangement of a data source decoder arranged in the video decoding apparatus according to the second embodiment.

FIGS. 15A and 15B are views for explaining the principle of a first decode value determination method in the video decoder according to the second embodiment.

FIGS. 16A and 16B are views for explaining the principle of a second decode value determination method in the video decoding apparatus according to the second embodiment.

FIG. 17 is a view for explaining the principle of a third decode value determination method in the video decoding apparatus according to the second embodiment.

FIG. 18 is a flow chart for explaining a procedure for a decode value determination method in the video decoding apparatus according to the second embodiment.

FIG. 19 is a flow chart for explaining a procedure by which the encoder of the video ending/decoding system variable-length-encodes the DCT coefficients of a video signal by using a reversible code.

FIG. 20 is a flow chart for explaining a procedure by which the forward decoder of the video encoding/decoding system variable-length-decodes encoded data containing a reversible code.

FIG. 21 is flow chart for explaining a procedure by which the backward decoder of the video encoding/decoding system variable-length-decodes encoded data containing a reversible code.

FIG. 22 is a view showing an INDEX table used to search a code word table for an INDEX value with RUN and LEVEL values of a non-LAST coefficient in the INTRA mode in the encoder of the video encoding/decoding system in FIG. 10.

FIG. 23 is a view showing an INDEX table used to search the code word table for an INDEX value with RUN and LEVEL values of a non-LAST coefficient in the INTER mode in the encoder of the video encoding/decoding system in FIG. 10.

FIG. 24 is a view showing an INDEX table used to search the code word table for an INDEX value with RUN and LEVEL values of a LAST coefficient in the encoder of the video encoding/decoding system in FIG. 10.

FIG. 25 is a view showing a part of the code word table used in the video encoding/decoding system in FIG. 10.

FIG. 26 is a view showing the remaining part of the code word table used in the video encoding/decoding system in FIG. 10.

FIG. 27 is a view showing a RUN fixed-length code word table used in the video encoding/decoding system in FIG. 10.

FIG. 28 is a view showing a LEVEL fixed-length code word table used in the video encoding/decoding system in FIG. 10.

FIG. 29 is a view showing the data format of a fixed-length reversible code used in the video encoding/decoding system in FIG. 10.

FIG. 30 is a view showing a part of the code word table used in the video encoding/decoding system in FIG. 10.

FIG. 31 is a view showing the remaining part of the code word table used in the video encoding/decoding system in FIG. 10.

FIG. 32 is a flow chart showing a procedure for a method of detecting an error in accordance with the occurrence of a bit pattern that is not used for a code word in the video decoding apparatus according to the second embodiment.

FIG. 33 is a flow chart showing a procedure for a method of detecting an error in accordance with the occurrence of a state that cannot exist in units of syntax in the video decoding apparatus according to the second embodiment.

FIG. 34 is a view showing another arrangement of the LEVEL fixed-length code word table.

FIG. 35 is a view showing another format of an encoded data sequence having ESCAPE codes added to its two ends.

FIG. 36 is a view showing still another format of an encoded data sequence having ESCAPE codes added to its two ends.

FIG. 37 is a flow chart showing a procedure for encode processing in the use of the encoded data sequence in FIG. 35 or 36.

FIG. 38 is a flow chart showing a procedure for encode processing in the use of the encoded data sequence in FIG. 35 or 36.

FIG. 39 is a flow chart showing a procedure for decode processing in the use of the encoded data sequence in FIG. 35 or 36.

FIG. 40 is a flow chart showing an error detection procedure used when the encoded data sequence in FIG. 35 or 36 is used.

FIG. 41 is a view showing an arrangement of a LEVEL fixed-length code word table using a two's-complement expression.

FIG. 42 is a view showing an arrangement of an encoded data sequence in the use of the LEVEL fixed-length code word table in FIG. 41.

FIG. 43 is a view showing another arrangement of the encoded data sequence in the use of the LEVEL fixed-length code word table in FIG. 41.

FIG. 44 is a view showing still another arrangement of the encoded data sequence.

FIG. 45 is a view showing still another arrangement of the encoded data sequence in the use of the LEVEL fixed-length code word table in FIG. 41.

FIG. 46 is a view showing still another arrangement of the encoded data sequence in the use of the LEVEL fixed-length code word table in FIG. 41.

FIG. 47 is a flow chart showing a procedure for forward decode processing used when the encoded data sequence in FIG. 42, 43, or 46 is used.

FIG. 48 is a flow chart showing a procedure for backward decode processing used when the encoded data sequence in FIG. 42, 43, or 46 is used.

FIG. 49 is a flow chart showing a procedure for forward decode processing used when the encoded data sequence in FIG. 45 is used.

FIG. 50 is a flow chart showing a procedure for backward decode processing used when the encoded data sequence in FIG. 45 is used.

FIG. 51 is a block diagram showing the arrangement of a variable-length decoding apparatus according to the third embodiment of the present invention.

FIG. 52 is a view showing a code that does not satisfy the Kraft inequality with an equal sign.

FIG. 53 is a view showing a code tree for a code that does not satisfy the Kraft inequality with an equal sign.

FIG. 54 is a view for explaining a two-dimensional symmetrical communication channel.

FIG. 55 is an example of a state transition diagram of code words on the two-dimensional symmetrical communication channel.

FIG. 56 is a state transition table of the code words on the two-dimensional symmetrical communication channel.

FIGS. 57A, 57B, and 57C are views showing the decoding operation of a decode value determination unit in the third embodiment.

FIGS. 58A, 58B, and 58C are views showing another decoding operation of the decode value determination unit in the third embodiment.

FIG. 59 is a view showing a system in which the variable-length decoding apparatus of the present invention is incorporated.

BEST MODE OF CARRYING OUT THE INVENTION

The embodiments of the present invention will be described below with reference to the accompanying drawings.

In the present invention, as variable length codes, reversible codes (Reversible VLCs), which can be decoded in the two directions, i.e., the forward and backward directions, are used. Reversible codes will therefore be described with reference to FIGS. 1 to 4 prior to a description of the embodiments of the present invention.

FIG. 1 shows a first method of forming the code words of a reversible code. First of all, as indicated on the left side of FIG. 1, two types of binary sequences having different weights (having 0 and 1 weight in this case), arranged in the increasing order of code lengths, and respectively having constant weights (the number of “1”s in this case) are prepared. As indicated by the middle portion of FIG. 1, “1”s are added to the beginning and end of each of these binary sequences, and the binary sequences with the weight 1 are inverted. Thereafter, these two types of binary sequences are synthesized, as indicated on the right side of FIG. 1.

The code length of this variable length code can be known by counting the number of the symbols at the beginning of the respective codes. In the case shown in FIG. 1, if the first symbol is “0”, the appearance of three “0”s indicates the boundary (code length) of a code. If the first symbol is “1”, the appearance of two “1”s indicates the boundary of a code. The code words of the variable length code in FIG. 1 which correspond to information symbols A to J can be assigned to the leaves of the forward code tree shown in FIG. 2A and the leaves of the backward code tree in FIG. 2B. As is obvious, therefore, this code can be decoded in both the forward and backward directions.

FIG. 3 shows a second method of forming the code words of a reversible code. First of all, as indicated on the left side of FIG. 3, first and second reversible codes are prepared. As indicated by the middle portion of FIG. 3, the first code word of the second reversible code is added to the end of every code word of the first reversible code. Likewise, every code word of the second reversible code is added one by one to the end of every code word of the first reversible code. Thereafter, as indicated on the right side of FIG. 3, the resultant code is rearranged into a new reversible code. With this forming method, a new reversible code having a code word count A×B (27 in this case), i.e., the product of a code word count A (A=9 in this case) of the first reversible code and a code word count B (B=3 in this case) of the second reversible code, can be formed.

When the reversible code formed by this forming method is to be decoded in the forward direction, the first reversible code is decoded first, and then the second reversible code is decoded. When this code is to be decoded in the backward direction, the second reversible code is decoded first, and then the first reversible code is decoded. Obviously, the code can be decoded in both the forward and backward directions.

In this case, the second reversible code is added to the end of each code word of the first reversible code. However, the second reversible code may be added to the beginning of the first reversible code or fixed-length codes may be added to both the end and beginning of the first reversible code. In addition, although different codes are used as the first and second reversible codes in this case, identical codes may be used. Furthermore, in this embodiment, variable length codes are used as the first and second reversible codes, either of the codes may be replaced with a fixed-length code.

FIG. 4 shows a third method of forming a reversible code. First of all, as indicated on the left side of FIG. 4, a variable length reversible code and a fixed-length reversible code are prepared. As indicated on the right side of FIG. 4, the fixed-length reversible code is added immediately after each bit of the code words of the reversible code. With this forming method, when a K-bit fixed-length reversible code is used, an H-bit code word is formed to have (K+1)H bits, and the code word count can be increased by 2 KH times.

In this case, the fixed-length code is added immediately after each bit of the code words of the reversible code. However, the fixed-length code may be added immediately before each bit, or may be added both immediately before and after each bit.

Variable-length encoding/decoding apparatuses according the embodiments of the present invention will be described next.

(First Embodiment)

FIG. 5 shows the arrangement of a variable-length encoding/decoding apparatus according to an embodiment of the present invention. This variable-length encoding/decoding apparatus generates variable-length-encoded data and decodes it. A sync code is periodically inserted in variable-length-encoded data. As a variable length code, a reversible code (Reversible VLC) that can be decoded in the two directions, i.e., the forward and backward directions, like those described above, is used.

As shown in FIG. 5, a variable-length encoding apparatus 11 is constituted by an encoder 111, a coded word table 112, and a sync section setting unit 113. The coded word table 112 stores variable length code words prepared in correspondence with information symbols in accordance with the reversible code word forming methods described with reference to FIGS. 1 to 4. The coded word table 112 also stores reversible codes, which can be decoded in both the forward and backward directions, in correspondence with the respective information symbols. The encoder 111 encodes an information symbol into a variable length code word by referring to the coded word table 112. The encoder 111 then selects and outputs a code word corresponding to the input information symbol from the code words stored in the coded word table 112. The sync section setting unit 113 combines the code words selected by the encoder 111 in each sync section, inserts a stuffing code that can be decoded in both the forward and backward directions, and outputs encoded data in each sync section. This encoded data is sent to a variable-length decoder 12 through a transmission system or storage system 13.

The variable-length decoder 12 is constituted by a sync section detector 121, a buffer 122, two switches S and T, a forward decoder 123, a forward code word table 124, a decode value determination unit 125, a backward decoder 126, and a backward code word table 127.

In the variable-length decoder 12, the sync sections of the encoded data input from the transmission system or storage system 13 are detected by the sync section detector 106, and the encoded data is decoded in each of the detected sync sections.

If the encoded data input from the transmission system or storage system 13 is a variable length code that can be decoded in only the forward direction, the switch S is connected to the A side. As a result, the forward decoder 123 performs normal forward decoding by using the forward code word table 124. The encoded data decoded by the forward decoder 123 is sent to the decode value determination unit 125.

If the encoded data is a variable-length code that can be decoded bidirectionally, the switch S is connected to the B side. As a result, all the encoded data within a sync section are temporarily stored in the buffer 122. The total number of bits of the encoded data formed from a variable length code that can be decoded bidirectionally is checked by counting the number of bits of the encoded data stored in the buffer 122 using the forward decoder 123 or the like. Thereafter, the encoded data is read out from the buffer 122, and normal forward decoding is started by the forward decoder 123 using the forward code word table 124. The forward decoder 123 performs this forward decoding operation while checking whether there is an error in the encoded data.

More specifically, when a bit pattern that cannot exist in the forward code word table 124 appears, or data to be decoded runs out before the total bit length of decoded encoded data reaches the total number of bits described above, or a state that is impossible in units of syntax (the rules of grammar for encoded data) has occurred, the forward decoder 123 detects that an error has occurred at the position where such a case is detected. The state that is impossible in units of syntax indicates, for example, a state in which when the number of code words contained in each encoded data corresponding to a lower layer is designated by encoded data on an upper layer, the designated number of code words does not coincide with the number of code words contained in each encoded data.

The error detection position in units of bits and the error detection position in units of syntax are sent as information indicating the detection position of the error to the decode value determination unit 125, together with the result obtained by normally completing forward decoding before the detection of the error, regardless of the condition under which the encoded data error is detected. In this case, the error detection position in units of bits indicates the specific bit number of the encoded data counted from the start of synchronization as the error detection position. The error detection position in units of syntax indicates, for example, the specific code word number of the encoded data counted from the start of synchronization as the position where the identical error is detected.

If an error is detected by the forward decoder 123, the switch T is turned on to send the encoded data stored in the buffer 122 to the backward decoder 126. The backward decoder 126 then starts decoding the data by using the backward code word table 127. This backward decoding is also performed while the presence/absence of an error in the decoded error is checked. Error detection is performed under the same condition as that in the case of the forward decoder 123. If an error is detected in backward decoding, the error detection position in units of bits and the error detection position in units of syntax are sent as information indicating the error detection position to the decode value determination unit 125, together with the result obtained by normally completing backward decoding before the detection of the error.

The decode value determination unit 125 determines the final decode result on the basis of the decode results obtained by the forward decoder 123 and the backward decoder 126. That is, the boundary between a correct code word and an incorrect code word is doubly checked on the basis of both the error detection positions in units of bits and syntax, which are respectively notified from the forward decoder 123 and the backward decoder 126. With this operation, the forward decode result and the backward decode result are selectively used as a decode value for only a code word that is assumed to be a correct code word with a considerably high probability, and the remaining code words are discarded.

FIGS. 6A and 6B show an example of a syntax for encoded data in this embodiment.

As shown in FIG. 6A, encoded data is divided into two information layers, namely D information on the upper layer and G information on the lower layer. Encoding is performed such that m G code words are present for each D code word. If D information is composed of n code words, G information following the D information is composed of n×m code words. In this case, sync intersections are set in units of combinations of D information and succeeding G information, and a resync marker (RM1) is inserted between the sync sections. In addition, a resync marker (RM2) is set between D information and G information.

D information is encoded with a variable length code that can be decoded in only the forward direction. G information is decoded with a variable length code that can be decoded bidirectionally. As is obvious from this syntax, the total number of code words of G information can be found out to be n×m when D information is decoded. This total code word count of G information is used to indicate an error detection position as a position in units of syntax, i.e., to determine which code word among the code words, belonging to an interval from the synchronization start position to the end position, has occurred an error.

FIGS. 7 and 8 show the operation of the decode value determination unit 304 in decoding the encoded data of G information formed from a reversible variable length code.

First of all, the following functions are defined for G information:

L: total number of bits

W: total number of code words (=n×m)

W1: number of code words decoded in forward direction

W2: number of code words decoded in backward direction

L1: number of bits decoded in forward direction

L2: number of bits decoded in backward direction

f_code(L1): number of code words obtained when L1 bits are decoded in forward direction

b_code(L2): number of code words obtained when L2 bits are decoded in backward direction

FIG. 7A shows a case wherein the error detection positions respectively obtained by the forward decoder 123 and the backward decoder 126 do not cross each other (i.e., do not pass each other) as both positions in units of bits and code words, i.e., a case wherein L1+L2<L and W1+W2<W. In this case, encoded data up to a position T code words before each error detection position is used. That is, W1−T code words in the forward direction and W2−T code words in the backward direction are used, and the remaining code words are discarded.

In this case, the encoded data is retraced by T code words. However, G information may be retraced by T bits or T blocks.

FIG. 7B shows a case wherein the error detection positions respectively obtained by the forward decoder 123 and the backward decoder 126 do not cross each other as positions in units of bits but cross each other as positions in terms of code words, i.e., a case wherein L1+L2<L and W1+W2≧W. Such a state occurs, for example, when each code word contained in encoded data is decoded as a code word having a bit pattern with a bit count smaller than the actual bit count for a while from the position where an error is actually mixed.

In this case, W−W2 code words in the forward direction and W−W1 code words in the backward direction are used, and the remaining code words are discarded.

FIG. 7A shows a case wherein the error detection positions respectively obtained by the forward decoder 123 and the backward decoder 126 cross each other as positions in units of bits, but do not cross each other as positions in terms of code words, i.e., a case wherein L1+L2≧L and W1+W2<W. Such a state occurs, for example, when each code word contained in encoded data is decoded as a code word having a bit pattern with a bit count larger than the actual bit count for a while from the position where an error is actually mixed.

In this case, the code words of W−b_code(L2) macroblocks in the forward direction and the code words of W−f_code(L1) macroblocks in the backward direction are used, and the remaining code words are discarded.

FIG. 7B shows a case wherein the error detection positions respectively obtained by the forward decoder 123 and the backward decoder 126 cross each other as both positions in units of bits and code words, i.e., a case wherein L1+L2≧L and W1+W2≧W. In this case, min {W−b_code(L2), W−W2} code words in the forward direction and min {W−f_code(L1), W−W1} code words in the backward direction are used, and the remaining code words are discarded.

In this case, since the total number of code words of G information is found by using the syntax in FIG. 2, a code word position is used as a position in units of syntax. However, the present invention can be applied to any case as long as logical positions obtained by using a syntax are used.

A procedure for a decoding method performed by the variable-length decoder 12 in this embodiment will be described next.

This decoding method is basically performed as follows. As described with reference to FIG. 5, encoded data using reversible variable length code words is decoded in the forward direction until an error is detected in the encoded data. When an error is detected in this forward decoding, backward decoding is performed until an error is detected in the encoded data. A decode value is then determined by using the forward and backward decode results and error detection positions in units of bits of encoded data and syntax which are respectively detected in the forward and backward decoding.

FIG. 9 is a flow chart showing a procedure for the method of decoding variable-length data formed from a reversible code.

First of all, the previously described functions L, W, W1, W2, L1, L2, f_code(L1), and b_code(L2) are defined, and forward decoding is started from first G information in a sync section (step S101). If no error is detected in this forward decoding within the sync section, the decode processing is terminated (step S102). If an error is detected in the forward decoding, backward decoding is started from last G information in the sync section (step S103). In general, if an error is detected in the forward decode processing, an error is normally detected in the backward decode processing.

If error detection positions do not cross each other as both positions in units of bits and positions in terms of code words, i.e., a case wherein L1+L2<L and W1+W2<W (step S104), the encoded data up to a position T code words before each error detection position is used. That is, W1−T code words in the forward direction and W2−T code words in the backward direction are used, and the remaining code words are discarded (step S105).

If the error detection positions do not cross each other as positions in units of bits but cross each other as positions in terms of code words, i.e., a case wherein L1+L2<L and W1+W1≧W (step S106), W−W2 code words in the forward direction and W−W1 code words in the backward direction are used, and the remaining code words are discarded (step S107).

If the error detection positions cross each other as positions in units of bits but do not cross each other as positions in terms of code words, i.e., a case wherein L1+L2≧L and W1+W2<W (step S108), W−b_code(L2) macroblocks in the forward direction and W−f_code(L1) macroblocks in the backward direction are used, and the remaining code words are discarded (step S109).

In a case other than those described above, i.e., a case wherein the error detection positions cross each other as both positions in units of bits and positions in terms of code words, i.e., a case wherein L1+L2≧L and W1+W2≧W, min {W−b_code(L2), W−W2} code words in the forward direction and min {W−f_code(L1), W−W1} code words in the backward direction are used, and the remaining code words are discarded (step S110).

(Second Embodiment)

FIG. 10 shows the arrangement of a variable-length encoding/decoding apparatus for video signals according to the second embodiment of the present invention.

This video encoding/decoding apparatus is made up of a video encoder 21, a video decoder 22, and a transmission system or storage system 23.

In the video encoder 21, the data encoded by a data source encoder 202 is divided into upper layer data and lower layer data by a video multiplexer 203, and the respective data are variable-length encoded. These upper and lower layer data are multiplexed, and sync section setting and the like are performed. The resultant data is smoothed by a transmission buffer 204. The resultant data is then sent as encoded data to the transmission system or storage system 23. An encoding control unit 201 controls the data source encoder 202 and the video multiplexer 203 in consideration of the buffer amount of the transmission buffer 204.

In the video decoder 22, the encoded data from the transmission system or storage system 23 is stored in a receiving buffer 205, and the encoded data is demultiplexed into upper and lower layer data in units of sync sections by a video demultiplexer 206. These data are variable-length-decoded. The resultant data are sent to a data source decoder 207. Finally, the video data are decoded.

In this case, the variable-length encoding/decoding apparatus described in the first embodiment is applied to the video multiplexer 203 and the video demultiplexer 206.

FIG. 11 is a block diagram showing the video demultiplexer 206 in the second embodiment.

The encoded data received by the receiving buffer 205 is sent to a demultiplexer 501, in which sync sections are detected, and the encoded data is demultiplexed into upper and lower layer data in units of sync sections. The resultant data are respectively sent to an upper layer variable-length decoder 502 and a lower layer variable-length decoder 503 to be variable-length-decoded.

FIGS. 12A and 12B show a syntax for encoded video data used in the second embodiment.

Encoded data is hierarchically arranged into upper layer data (FIG. 12A) and lower layer data (FIG. 12B) in units of video packets. Sync sections are respectively set in upper and lower layer data with a resync marker (RM) and a motion marker (MM). In addition, “ST” on the lower layer represents a stuffing code.

According to this syntax, part of the mode information and vector information of a macroblock as a unit in prediction encoding of a video signal belong to the upper layer, whereas part of the mode information, INTRA DC (the DC value of a DCT coefficient in intraframe encoding), and DCT coefficient information belong to the lower layer. In addition, sync codes indicating boundaries are set in the respective information. As the DCT coefficient information, a reversible code is used.

A video packet normally includes a plurality of macroblocks. The number of the first macroblocks contained in the video packet is set in header information on the upper layer. In addition, mode information 1 and motion vector information on the upper layer are set in units of macroblocks. The number of loops of mode information 1 and motion vector information corresponds to the number of macroblocks contained in the video packet.

FIG. 13 is a block diagram showing the arrangement of the lower layer variable-length decoder 503 in the second embodiment.

As described above, of the data demultiplexed into the upper and lower layer encoded data in units of sync sections by the demultiplexer 501 in FIG. 1, the lower layer encoded data is sent to the lower layer variable-length decoder 503.

In this lower layer variable-length decoder 503, until DCT coefficient information is detected in units of syntax, a switch S is connected to the A side, and a forward decoder 704 performs normal forward decoding by using a forward code word table 703. The encoded data decoded by the forward decoder 704 is sent to a decode value determination unit 705. If an error is detected, the decoded data is compared with the decode result obtained by the upper layer variable-length decoder 502 to determine a decode result.

If the encoded data is DCT coefficient information, the switch S is connected to the B side, and all the DCT coefficient information in a sync section is stored in a buffer 702. For example, the forward decoder 704 or the like counts the number of bits of the encoded data stored in the buffer 702 to check the total number of bits of the DCT coefficient information formed from a reversible variable length code. Thereafter, the encoded data is read out from the buffer 702, and the forward decoder 704 starts normal forward decoding by using the forward code word table 703. The forward decoder 704 performs forward decoding while checking whether there is an error in the encoded data.

More specifically, for example, when a bit pattern that cannot exist in the forward code word table 703 appears, or data to be decoded runs out before the total number of bit lengths of decoded encoded data reaches the total number of bits described above, or a state that is impossible in units of syntax occurs, the forward decoder 704 detects that an error has occurred at the corresponding detection position. The state that is impossible in units of syntax indicates, for example, a state wherein the sum of the run of zeros and number of nonzero coefficients in each block of 8×8 DCT coefficients is larger than 64.

The error detection position in units of bits and the error detection position in units of syntax are sent as information indicating the detection position of the error to the decode value determination unit 705, together with the result obtained by normally completing forward decoding before the detection of the error, regardless of the condition under which the encoded data error is detected. In this case, the error detection position in units of bits indicates the specific bit number of the encoded data counted from the start of synchronization of the DCT coefficient information as the error detection position. The error detection position in units of syntax indicates the specific macroblock number counted from the start of synchronization as the position where the identical error is detected.

When an error is detected by the forward decoder 704, a switch T is turned on to send the encoded data stored in the buffer 122 to a backward decoder 708. The backward decoder 708 starts backward decoding by using a backward code word table 707. The backward decoder 708 performs this backward decoding while checking whether there is an error in the encoded data formed from reversible DCT coefficient information. Error detection is performed under the same condition as in the case of the forward decoder 704. If an error is detected in the backward decoding, the error detection position in units of bits and the error detection position in units of syntax are sent as information indicating the position where the error is detected to the decode value determination unit 705, together with the result obtained by normally completing decoding before the detection of the error.

The decode value determination unit 705 determines a final decode result by comparing the decode result obtained by the forward decoder 704 with the decode result obtained by the backward decoder 708. That is, the boundary between a correct macroblock and an incorrect macroblock is doubly checked on the basis of both the error detection positions in units of bits and syntax, which are respectively notified from the forward decoder 704 and the backward decoder 708. With this operation, the forward decode result and the backward decode result are selectively used as a decode value for only a macroblock in which all the code words are assumed to be correct with a considerably high probability, and the remaining macroblocks are discarded.

FIG. 14 shows an example of the arrangement of the data source decoder 207.

The data source decoder 207 receives the mode information, the motion vector information, the DCT coefficient information, and the like which are demultiplexed by the video demultiplexer 206 and variable-length-decoded.

If the mode information is INTRA, a mode determination circuit 804, to which the mode information is input, turns off a mode switch 805 to be disconnected from a frame memory 806. The DCT coefficient information is then dequantized by a dequantizer 801 and is subjected to inverse discrete cosine transform in an IDCT circuit 802. As a result, a reconstruction image signal is generated. This reconstruction image signal is stored as a reference image in the frame memory 806 and is output as a reproduction image signal to a display unit.

If the mode information is INTER, the mode switch 805 is turned on to connect an adder 803 to the frame memory 806. With this operation, the DCT coefficient information is dequantized by the dequantizer 801 and is subjected to inverse discrete cosine transform in the IDCT circuit 802. The adder 803 adds the resultant data to the information obtained by motion compensation for the reference image in the frame memory 806 on the basis of the motion vector information to generate a reconstruction image signal. This reconstruction image signal is stored as a reference image in the frame memory 806 and is also output as a reproduction image signal.

FIGS. 15A to 16B show the operation of the decode value determination unit 705 which is to be performed when the encoded data of DCT coefficient information formed from a reversible variable length code is to be decoded.

First of all, the following functions for the DCT coefficient information are defined:

-   -   L: total number of bits     -   N: total number of macroblocks     -   N1: number of macroblocks decoded in forward direction     -   N2: number of macroblocks decoded in backward direction     -   L1: number of bits decoded in forward direction     -   L2: number of bits decoded in backward direction     -   f_mb(L): number of macroblocks obtained when L bits are decoded         in forward direction     -   b_mb(L): number of macroblocks obtained when L bits are decoded         in backward direction

FIG. 15A shows a case wherein the error detection positions respectively obtained by the forward decoder 704 and the backward decoder 708 do not cross each other as both positions in units of bits and positions in units of macroblocks, i.e., a case wherein L1+L2<L and N1+N2<N. In this case, assume that bits to a position retraced by T bits are used, the coefficient information of f_mb(L1−T) macroblocks in the forward direction and the coefficient information of b_mb(L2−T) macroblocks in the backward direction are used, and the remaining coefficient information is discarded.

In this case, the DCT coefficient information is retraced by T bits. However, this information may be retraced by T code words, T blocks, or T macroblocks.

FIG. 15B shows a case wherein the error detection positions respectively obtained by the forward decoder 704 and the backward decoder 708 do not cross each other as positions in units of bits but cross each other as positions in units of macroblocks, i.e., a case wherein L1+L2<L and N1+N2≧N. In this case, the coefficient information of N−N2−1 macroblocks in the forward direction and the coefficient information of N−N1−1 macroblock in the backward direction are used, and the remaining coefficient information is discarded.

FIG. 16A shows a case wherein the error detection positions respectively obtained by the forward decoder 704 and the backward decoder 708 cross each other as positions in units of bits but do not cross each other as positions in units of macroblocks, i.e., a case wherein L1+L2≧L and N1+N2<N. In this case, the coefficient information of N−b_mb(L2) macroblocks in the forward direction and the coefficient information of N−f_mb(L1) macroblocks in the backward direction are used, and the remaining coefficient information is discarded.

FIG. 16B shows a case wherein the error detection positions respectively obtained by the forward decoder 704 and the backward decoder 708 cross each other as both positions in units of bits and positions in units of macroblocks, i.e., a case wherein L1+L2≧L and N1+N2≧N. In this case, the coefficient information of min {N−b_mb(L2), N−N2−1} macroblocks in the forward direction and the coefficient information of min {N−f_mb(L1), N−N1−1} macroblocks in the backward direction are used, and the remaining coefficient information is discarded.

In this case, with regard to the macroblocks from which DCT coefficients are discarded, in the INTRA mode, a previous frame is displayed without any change, or processing as a mode without encoding is performed. In the INTER mode, a decode value is determined to display the information with motion compensation (MC) by using upper layer motion vector (MV) information.

When any one of the states shown in FIGS. 15A, 15B, 16A, and 16B occurs, as shown in FIG. 17, the DCT coefficients of some or all of the macroblocks in the INTRA mode within the corresponding sync section are discarded, and a previous frame corresponding to the discarded information may be displayed or processing as a mode without encoding is performed, even if no error is detected. In the INTRA mode, an error greatly affects a frame. More specifically, when a wrong coefficient is displayed, a block in an unnatural color appears in the frame. If, therefore, at least the presence of an error in a sync section is known in advance, the influence of the error on the frame can be reduced by discarding the macroblocks in the INTRA mode.

In the second embodiment, DCT coefficients are discarded in units of macroblocks. Obviously, however, this operation may be performed in units of blocks.

A procedure for the decoding method performed by the lower layer variable-length decoder 503 in the second embodiment will be described next.

This decoding method is basically performed as follows. As shown in FIG. 13, DCT coefficient information formed from reversible variable length code words is decoded in the forward direction until an error is detected in the information. When an error is detected in this forward decoding, backward decoding is performed until an error is detected in the DCT coefficient information. A decode value is then determined by using the forward and backward decode results and error detection positions in units of bits of encoded data and syntax which are respectively detected in the forward and backward decoding.

A procedure for decoding the DCT coefficient portion of an AC component will be described below with reference to the flow chart of FIG. 18.

First of all, the previously described functions L, N, N1, N2, L1, L2, f_mb(L), and b_mb(L) are defined. Forward decode processing is then started (step S201). If no error is detected in this forward decode processing, the decode processing is terminated (step S202). If an error is detected in the forward decode processing, backward decoding is started (step S203). If an error is detected in the forward decode processing, an error is normally detected in backward decode processing.

If the error detection positions do not cross each other as both positions in units of bits and positions in units of macroblocks, i.e., L1+L2<L and N1+N2<N (step S204), the bits up to a position retraced by T bits are used. That is, the coefficient information of f_mb(L1−T) macroblocks in the forward direction and the coefficient information of b_mb(L2−T) macroblocks in the backward direction are used, and the remaining coefficient information is discarded (step S205).

If the error detection positions do not cross each other as positions in units of bits but cross each other as positions in units of macroblocks, i.e., L1+L2<L and N1+N2≧N (step S206), the coefficient information of N−N2−1 macroblocks in the forward direction and the coefficient information of N−N1−1 macroblocks in the backward direction are used, and the remaining coefficient information is discarded (step S207).

If the error detection positions cross each other as positions in units of bits but do not cross each other as positions in units of macroblocks, i.e., L1+L2≧L and N1+N2<N (step S208), the coefficient information of N−b_mb(L2) macroblocks in the forward direction and the coefficient information of N−f_mb(L1) macroblocks in the backward direction are used, and remaining coefficient information is discarded (step S209).

If the error detection positions correspond to another case, and more specifically, if the error detection positions cross each other as both positions in units of bits and positions in units of macroblocks, i.e., L1+L2≧L and N1+N2≧N, the coefficients of min{N−b_mb(L2), N−N2−1} macroblocks in the forward direction and the coefficients of min{N−f_mb(L1), N−N1−1} macroblocks in the backward direction are used, and the remaining coefficients are discarded (step S210).

If an error is detected, the DCT coefficients of all the macroblocks in the INTRA mode within the corresponding sync section are discarded, and a previous frame is displayed without any change or processing as a mode without encoding is performed (step S211).

With regard to the macroblocks from which the DCT coefficients are discarded, in the INTRA mode, a previous frame is displayed without any change, or processing as a mode without encoding is performed. In the INTER mode, a decode value is determined to display the information with motion compensation (MC) by using upper layer motion vector (MV) information (step S212).

A detailed arrangement of a code word table used in the video encoding/decoding apparatus of the second embodiment and encoding/decoding of a reversible code using the table will be described next.

The data source encoder 202 in FIG. 10 performs intra-block scanning in units of 8×8 DCT coefficient blocks after quantization to obtain LAST (0: a non-last nonzero coefficient in a block, 1: the last nonzero coefficient in the block), RUN (the run of zeros up to a nonzero coefficient), and LEVEL (the quantized value of a coefficient), and sends them to the video multiplexer 203.

The video multiplexer 203 includes an upper layer variable-length encoder and a lower layer variable-length encoder. The code word table of the lower layer variable-length encoder for performing variable-length encoding using a reversible code includes the four tables shown in FIGS. 22 to 26. FIG. 22 shows an INDEX table for searching the code word tables in FIGS. 25 and 26 for an INDEX value with RUN and LEVEL of a non-LAST coefficient for INTRA (intraframe encoding). FIG. 23 shows an INDEX table for searching the code word tables in FIGS. 25 and 26 for an INDEX value with RUN and LEVEL of a non-LAST coefficient for INTER (interframe encoding). FIG. 24 shows an INDEX table for searching the code word tables in FIGS. 25 and 26 for an INDEX value with RUN and LEVEL of a LAST coefficient common to INTRA and INTER. FIGS. 25 and 26 show code word tables in which INDEX values are made to correspond to reversible variable length code words (VLC-CODE). In addition, as tables for conversion to fixed-length reversible code words, the RUN fixed-length code word table shown in FIG. 27 and the LEVEL fixed-length code word table shown in FIG. 28 are used.

A procedure for variable-length encode processing performed by the lower layer variable-length encoder using these tables will be described below with reference to the flow chart of FIG. 19.

First of all, INDEX tables to be used are selected in accordance with the prediction mode designated by upper layer mode information (step S301). In this case, if the prediction mode is INTRA, the INDEX tables shown in FIGS. 22 and 24 are selected. If the prediction mode is INTER, the INDEX tables shown in FIGS. 23 and 24 are selected.

It is then checked whether the RUN and LEVEL values of the DCT coefficient to be encoded are not more than the maximum RUN and LEVEL values defined in the INDEX tables to be used (step S302). If the RUN and LEVEL values are not more than the maximum RUN and LEVEL values defined in the INDEX tables, the RUN and LEVEL values are used to search the INDEX tables to obtain an INDEX value for searching the code word tables shown in FIGS. 25 and 26 (step S303). It is checked whether the INDEX value obtained from the INDEX tables is “0” (step S304). If this value is not “0”, the code word tables in FIGS. 25 and 26 are searched to output a reversible code word corresponding to the INDEX value (step S305). The last bit “s” of each reversible code word in the code word tables in FIGS. 25 and 26 represents the sign of LEVEL. When “s” is “0”, the sign of LEVEL is positive. When “s” is “1”, the sign of LEVEL is negative.

If the RUN and LEVEL values to be encoded exceed the maximum RUN and LEVEL values defined in the INDEX tables to be used, or the INDEX value obtained from the INDEX tables is “0”, (LAST, RUN, and LEVEL) are fixed-length are encoded into fixed-length codes. ESCAPE codes are then added to each code at its two ends, and the resultant codes are output (step S306). More specifically, the RUN and LEVEL values are respectively converted into 6- and 7-bit fixed-length codes by using the RUN fixed-length code word table in FIG. 27 and the LEVEL fixed-length code word table in FIG. 28, and one bit corresponding to the LAST value is added to the beginning of each of these fixed-length codes, as shown in FIG. 29. In addition, ESCAPE codes are added to the two ends of each code sequence. The ESCAPE code at the beginning is “00001”, and the ESCAPE code at the end is a reversible code “0000s” to be searched out with INDEX value=“0” in the code word tables in FIGS. 25 and 26. The last bit “s” of this reversible code “0000s” indicates the sign of LEVEL. When “s” is “0”, the sign of LEVEL is positive. When “s” is “1”, the sign of LEVEL is negative.

A reversible code decoding method performed by the forward decoder 704 and the backward decoder 708 will be described next.

In the forward code word table 703 and the backward code word table 707, decode value tables like those shown in FIGS. 30 and 31 are prepared as code word tables, in addition to the code word tables in FIGS. 25 and 26, the RUN fixed-length code word table in FIG. 27, and the LEVEL fixed-length code word table in FIG. 28. In the decode value tables in FIGS. 30 and 31, decode values for (LAST, RUN, and LEVEL) corresponding to the INDEX values in the INTRA and INTER modes are set.

Forward decode processing will be described first with reference to the flow chart of FIG. 20.

First of all, decode processing for encoded data is performed, and an INDEX value corresponding to the reversible code word is obtained by using the code word tables shown in FIGS. 25 and 26 (step S401). It is then checked whether the INDEX value is “0” (step S402). If this value is not “0”, the decode value tables in FIGS. 30 and 31 are searched with the INDEX value and the mode to obtain decode values of (LAST, RUN, and LEVEL) which correspond to the used prediction mode and INDEX value (step S403). If the INDEX value is “0”, since it indicates an ESCAPE code, the succeeding fixed-length codes of (LAST, RUN, and LEVEL) are decoded by using the fixed-length code word tables in FIGS. 27 and 28 (step S404). The ESCAPE code at the end is decoded (step S405). The sign of LEVEL is determined by using the last one bit of each code word (step S406).

Backward decode processing will be described next with reference to the flow chart of FIG. 21.

First of all, the sign of LEVEL is determined on the basis of the first one bit of the code word (step S501). An INDEX value corresponding to the reversible code word is obtained by using the code word tables shown in FIGS. 25 and 26 (step S502). It is then checked whether the INDEX value is “0” (step S503). If this value is not “0”, the decode value tables in FIGS. 30 and 31 are searched with the INDEX value and the prediction mode to obtain decode values of (LAST, RUN, and LEVEL) which correspond to the used prediction mode and INDEX value (step S504). If the INDEX value is “0”, since it indicates an ESCAPE code, the succeeding fixed-length codes of (LAST, RUN, and LEVEL) are decoded by using the fixed-length code word tables in FIGS. 27 and 28 (step S505). The ESCAPE code at the beginning is then decoded (step S506).

A procedure for error detection processing performed in each of forward decode processing and backward decode processing in the second embodiment will be described next.

FIG. 32 is a flow chart for detecting an error depending on whether a bit pattern that cannot exist in the forward code word table 124 appears in encoded data.

First of all, in order to check whether a corresponding code word is present in the code word table used in forward or backward decode processing, it is checked whether the INDEX value obtained by the above decode processing for the encoded data is present (step S601). If the INDEX value is not present, it is determined that a code word pattern that cannot exist in the table has appeared, thereby detecting an error (step S606).

If the INDEX value is present in the table, it is checked whether the INDEX value is “0” (step S602). If the INDEX value is “0”, since it indicates that encoding is performed by using an ESCAPE code, it is checked whether a combination of (LAST, RUN, LEVEL) is present in the code word table (step S603). If the combination is present in the code word table, it is determined that a code word pattern that does exist in the table has appeared, thereby detecting an error (step S606). If the combination of (LAST, RUN, LEVEL) is not present in the code word table, it is checked whether an ESCAPE code is present at the end of the fixed-length code (step S604). If no ESCAPE code is present, it is determined that a code word pattern that cannot exist in the table has appeared, thereby detecting an error (step S606). If the ESCAPE code is present, it is determined that the pattern is a correct encoded bit pattern, and proper decode processing is performed (step S605).

When the INDEX value is present in the code word table and the INDEX value is not 0, the code bit pattern is determined as a correct code bit pattern, and decode processing is properly performed (step S605).

FIG. 33 is a flow chart for detecting an error depending on whether a state that is impossible in units of syntax has occurred. In this case, it is checked in units of 8×8 DCT coefficient blocks whether the sum of the run of zeros and number of nonzero coefficients is larger than 64.

First of all, it is checked whether a DC component in 8×8 DCT coefficients is contained in the encoded data of the DCT coefficient portion of an AC component (step S701). If the DC component is contained, “0” is set as an initial value in a variable SUM representing the sum of the run of zeros and number of nonzero coefficients (step S702). If the component is not contained, “1” is set as an initial value in the variable SUM (step S703).

Subsequently, variable-length decoding of the encoded data of each DCT coefficient given by (LAST, RUN, and LEVEL) is repeatedly executed until LAST=“1” (steps S704 to S707). In this processing, every time variable-length decoding of (LAST, RUN, LEVEL) is performed in step S704, the value obtained by adding one to the RUN value representing the run of zeros up to a nonzero coefficient, i.e., the value of RUN+1 is added to the variable SUM (step S705). The reason why the RUN value is incremented by one is that one coefficient is decoded regardless of whether it is a zero or nonzero coefficient. It is then checked whether the value of the variable SUM is larger than 64 (step S706). If the value of the variable SUM is larger than 64, the occurrence of a syntax error is detected (step S709).

If no syntax error is detected until the LAST coefficient becomes “1”, the decoding processing for this block is normally terminated (step S708).

(Another Format Having ESCAPE Codes Added to Two Ends of Code Sequence)

FIGS. 34 and 35 show another format having ESCAPE codes added to the two ends of a code sequence. The RUN and LEVEL values are respectively converted into 6- and 11-bit fixed-length codes by using the RUN fixed-length code word table in FIG. 23 and the LEVEL fixed-length code word table in FIG. 34. At this time, Marker Bits “1” are set at the two ends of LEVEL to limit the run of zeros. As shown in FIG. 35, one bit corresponding to a LAST value is added to the beginning of this code sequence. In addition, ESCAPE codes are added to the two ends of the code sequence. The ESCAPE code at the beginning is “00001”, and the ESCAPE code at the end is the reversible code “0000s” that is searched out with INDEX value=“0” in the code word tables in FIGS. 25 and 26. The last bit “s” of this reversible code “0000s” represents the sign of LEVEL. When “s” is “0”, the size of LEVEL is positive. When “s” is “1”, the sign of LEVEL is negative.

FIG. 37 shows a procedure for lower layer variable-length encode processing which corresponds to FIG. 19.

Steps S801 to S805 are the same as steps S301 to S305 in FIG. 19. This procedure differs from that in FIG. 19 in step S806. In this case, Marker Bits are set at the two ends of LEVEL.

FIGS. 38 and 39 show reversible code decoding methods respectively performed by the forward decoder 704 and the backward decoder 708.

Steps S901, S902, S903, S905, and S906 in the forward decode processing in FIG. 38 are the same as steps S401, S402, S403, S405, and S406 constituting the forward decode processing in FIG. 20. This processing differs from that in FIG. 20 in step S904. In step S904, the fixed-length codes of (LAST, RUN, LEVEL) following an ESCAPE code and Marker Bit are decoded as well as the fixed-length codes of (LAST, RUN, LEVEL) following the ESCAPE code.

Similarly, steps S1001, S1002, S1003, S1005, and S1006 are the same as steps S501, S502, S504, S505, and S506 constituting the backward decode processing in FIG. 21. This procedure differs from that in FIG. 21 in step S1005. In this case, the fixed-length codes of (LEVEL, RUN, LAST) and Marker Bit are decoded as well as the fixed-length codes of (LEVEL, RUN, LAST).

In this case, as a format having ESCAPE codes added to the two ends of a code sequence, the format in which RUN consists of 6 bits and LEVEL consists of either 7 or 11 bits is exemplified. The numbers of bits are not limited to these.

FIG. 36 shows another format having ESCAPE codes added to the two ends of a code sequence. If, for example, the fixed-length code of LEVEL is long and exceeds the zero run limit, Marker Bit is preferably inserted between the fixed-length codes of LEVELs, as shown in FIG. 36. If, for example, the code length of a sync code such as a resync marker is 17 bits (zero run of 16 bits+1: “00000000000000001”), the run of zeros is limited not more than 15 bits to avoid confusion between the sync word and other code words. In this case, if the fixed-length code of LEVEL is long, and the run of zeros may exceed 16 bits, Marker Bit is inserted between the fixed-length codes of LEVELs, as shown in FIG. 36. This can avoid confusion between the fixed-length code of LEVEL and a sync word even if the fixed-length code length is long.

FIG. 40 is a flow chart showing a method of detecting a code word pattern in which no AC-DCT portion exists. This flow chart corresponds to FIG. 32.

To check whether the code word is present in a code word table, it is checked whether an INDEX value is present (step S1101). If the INDEX value is not present, a code word pattern that cannot exist has occurred (step S1107).

If the INDEX value is present, it is checked whether the INDEX value is 0 (step S1102). If the INDEX is 0, it indicates that encoding is performed by using an ESCAPE code. In this case, a combination of (LAST, RUN, and LEVEL) is decoded to check whether the combination is present in the code word table (step S1103). If the combination is present in the code word table, a code word pattern that cannot exist has occurred (step S1107).

It is also checked whether Maker Bit is correct (step S1104). If Marker Bit is not correct, a code word pattern that cannot exist has occurred (step S1107).

If the INDEX value is not 0, it indicates that decoding has been properly performed (step S1106).

If Maker Bit is correct in the case of the combination that cannot exist in the code word table, it is checked whether an ESCAPE code is present at the end of the fixed-length code (step S1105). If no ESCAPE code is present, a code word pattern that cannot exist has occurred (step S1107). If an ESCAPE code is present, it indicates that decoding has been properly performed (step S1106).

As described above, in this case, the processing of determining whether Marker Bit is correct is added to error detection processing performed in each of forward decode processing and backward decode processing.

(Still Another Format Having ESCAPE Codes Added to Two Ends of Code Sequence)

FIGS. 41 and 42 show still another format having ESCAPE codes added to the two ends of a code sequence. Assume that a LEVEL value is expressed in a two's-complement form. In this case, since the sign of LEVEL is specified by a code word of LEVEL, an ESCAPE code at the end of the code sequence is “00001”, and the code “s” representing the sign of LEVEL is not used.

RUN and LEVEL values are respectively converted into fixed-length codes by using the RUN fixed-length code word table in FIG. 27 and the LEVEL fixed-length code word table in FIG. 41. At this time, Marker Bits “1” are set at the two ends of LEVEL to limit the run of zeros. As shown in FIG. 42, one bit corresponding to a LAST value is added to the beginning of this code sequence. In addition, ESCAPE codes are added to the two ends of the code sequence.

The insertion of Marker Bit between the end of LEVEL and the ESCAPE code can be omitted depending on the fixed code length of LEVEL. FIG. 43 shows an example of this case. FIG. 43 shows a case wherein the fixed code length of LEVEL is 12 bits.

The run of zeros of LEVEL is (fixed code length of LEVEL—2) bits. If, therefore, the fixed code length of LEVEL is 13 bits or less, even if the run of zeros of the ESCAPE code at the end, which is 4 bits, is added to the fixed code length, the sum of runs of zeros is smaller than the limit value (16 bits) set for a 16-bit sync code.

In addition, since the zero run limit is determined by the number of bits of a sync code as described above, if the code length of a sync code is set to be long, the insertion of Marker Bit can be omitted regardless of whether an absolute value or a two's-complement number is used as a code word of LEVEL, as shown in FIGS. 44 and 45.

In contrast to this, even if a code word of LEVEL is expressed in a two's-complement form, Marker Bit may be inserted in the code of LEVEL so as not to exceed the zero run limit in the same manner as in FIG. 36. FIG. 46 shows an example of this case.

FIG. 47 shows a case wherein a code word of LEVEL is expressed in a two's-complement form, and Marker Bit is inserted in the code word, i.e., a procedure for forward decode processing to be performed when the encoded data sequence shown in FIG. 42, 43, or 46 is used.

This processing differs from the forward decode processing in FIG. 38 in which an absolute value is used as a code word of LEVEL in that step S906 is omitted. More specifically, when a code word of LEVEL is expressed in a two's-complement form, the sign of LEVEL is also determined in decode processing for the fixed-length codes of (LAST, RUN, and LEVEL) and Marker Bit in step S204.

FIG. 48 shows a case wherein a code word of LEVEL is expressed in a two's-complement from, and Marker Bit is inserted in the code word, i.e., a procedure for backward decode processing to be performed when the encoded data sequence shown in FIG. 42, 43, or 46 is used.

This processing differs from the backward decode processing (FIG. 39) using an absolute value as a code word of LEVEL in that step S1301 is omitted. More specifically, when a code word of LEVEL is expressed in a two's-complement form, the sign of LEVEL is also determined in decode processing for the fixed-length codes of (LEVEL, RUN, LAST) and Marker Bit in step S1304.

FIG. 49 shows a case wherein a code word of LEVEL is expressed in a two's-complement form, and Marker Bit is not used, i.e., a procedure for forward decode processing to be performed when the encoded data sequence in FIG. 45 is used. This processing differs from that in FIG. 47 in that only the fixed-length codes of (LAST, RUN, LEVEL) are decoded in step S1204.

FIG. 50 shows a case wherein a code word of LEVEL is expressed in a two's-complement form, and Marker Bit is not used, i.e., a procedure for backward decode processing to be performed when the encoded data sequence in FIG. 45 is used. This processing differs from that in FIG. 48 in that only the fixed-length codes of (LEVEL, RUN, LAST) are decoded in step S1505.

(Third Embodiment)

An error range estimating method which can be applied to decode value determination processing in the first and second embodiments will be described as the third embodiment of the present invention.

FIG. 51 is a block diagram showing the arrangement of a variable-length decoder 109 according to the third embodiment of the present invention.

The variable-length decoder 109 is designed to decode encoded data containing variable length codes in units of sync sections as in the first and second embodiments, and has the same basic arrangement as that of the first and second embodiments.

In the variable-length decoder 109, when encoded data is a variable length code that can be decoded only in the forward direction, a switch S is connected to A, and normal forward decoding is performed by a forward decoder 104. The encoded data decoded by the forward decoder 104 is sent to a decode value determination unit 105.

When the encoded data is a reversible variable length code that can be decoded in both the forward and backward directions, the switch 101 is connected to B, and the encoded data is stored in a buffer 102. After the total number of bits of the encoded data is checked, the data is decoded by the forward decoder 104.

If an error is detected by the forward decoder 104, a switch 106 is turned on, and the encoded data stored in the buffer 102 is decoded by a backward decoder 108 in the backward direction.

In the forward decoder 104 and the backward decoder 108, when, for example, a code that cannot exist appears, it is determined that an error has occurred.

The decode value determination unit 105 determines a final decode result on the basis of a combination of the decode results respectively obtained by the forward decoder 104 and the backward decoder 108.

The operation of the decode value determination unit 105 for the encoded data of a reversible variable length code will be described below.

In the third embodiment, a final decode value is determined by estimating an error range from the encoded data error detection positions detected in forward and backward decode processing, the error rate in the transmission system or storage system, the occurrence probability of each code word, and the bit pattern of each code word in a code word table. In the first and second embodiments, a range preceding an error detection position by a predetermined amount (T code words) is specified as an error propagation range in a fixed manner. In contrast to this, in the third embodiment, an optimal value of T is obtained by estimating an error propagation range.

It is known that the code length of a Huffman code obtained by optimal encoding of a memoryless information source satisfies the following Kraft inequality with an equal sign if the code is two-dimensional.

$\begin{matrix} {{\sum\limits_{x \in X}^{\;}\; 2^{{- 1}{(X)}}} = 1} & (1) \end{matrix}$ where x is a code word of a code X, and 1(x) is the code length of x.

When sync sections are set, and sync codes are inserted as in the present invention, since design is made to prevent a collision with a sync code pattern (e.g., 000, . . . , 01), a code that does not satisfy the Kraft inequality with an equal sign is used.

$\begin{matrix} {{\sum\limits_{x \in X}^{\;}\; 2^{{- 1}{(X)}}} < 1} & (2) \end{matrix}$

In codes like those shown in FIGS. 56, 57A, 57B, and 57C, “0000” is designated as a forbidden code word to prevent a collision with a sync code. In such a code, when a variable length code cannot be properly decoded upon mixing of an error, and the pattern “0000” that cannot exist appears, the occurrence of an error can be detected.

In a communication channel model of the transmission system or storage system for transmitting or storing encoded data, if a two-dimensional symmetrical communication channel with an error rate ε (0<ε<1) as shown in FIG. 58 is assumed, a conditional probability P_((y|P(y|x)x)) of transmission of a code word x and reception of a reception sequence y can be given as follows, without consideration of bit insertion and loss.

$\begin{matrix} {P_{({y|x})} = \left\{ \begin{matrix} {ɛ^{d{({x,y})}}\left( {1 - ɛ} \right)}^{{1{(x)}} - {d{({x,y})}}} & {{1(x)} = {1(y)}} \\ 0 & {{1(x)} \neq {1(y)}} \end{matrix} \right.} & (3) \end{matrix}$ where d(x,y) is the Hamming distance between the sequence x and the sequence y.

Consequently, a probability P(y) of reception of the sequence y is given by

$\begin{matrix} {{P(y)} = {\sum\limits_{x \in X}^{\;}\;{{P(x)}{P\left( y \middle| x \right)}}}} & (4) \end{matrix}$ Assume that the number of code words of the code X is finite, and P(x)>0 for all code words x.

However, in order to analyze the state between the instant at which a bit stream is input and the instant at which an error is detected, a state (initial state I) in which at least a 1-bit error is included must be considered.

Since the probability that the code word x does not include even a 1-bit error is given by (1−ε)^(1(x)), the conditional probability that each code word includes at least 1 1-bit error can be given by

$\begin{matrix} \begin{matrix} {{P^{\prime}\left( y \middle| x \right)} = \left\{ \begin{matrix} \frac{P\left( y \middle| x \right)}{1 - \left( {1 - ɛ} \right)^{1{(x)}}} & {{d\left( {x,y} \right)} \neq 0} \\ 0 & {{d\left( {x,y} \right)} = 0} \end{matrix} \right.} \\ {{P^{\prime}(y)} = {\sum\limits_{x \in X}^{\;}\;{{P(x)}{P^{\prime}\left( y \middle| x \right)}}}} \end{matrix} & (5) \end{matrix}$

Consider a target code that can be instantaneously decoded. In this case, the reception sequence y without any error starts from the root of a code tree and always reaches a leaf portion of the code tree.

In the presence of an error, however, the reception sequence y may start or may be received in the state of a node as well as a leaf portion of the code tree, and hence can be expressed by a state transition diagram like that of FIG. 55. Since a transition probability t_(ij) to each state is given by

$\begin{matrix} {t_{ij} = \left\{ \begin{matrix} {\sum\limits_{y \in Y}^{\;}\;{{P^{\prime}(y)}{V\left( {y,\left. i\rightarrow j \right.} \right)}}} & {i = 1} \\ {\sum\limits_{y \in Y}^{\;}\;{{P(y)}{V\left( {y,\left. i\rightarrow j \right.} \right)}}} & {i \geq 2} \end{matrix} \right.} & (6) \end{matrix}$ the state transition probability t_(ij) of transition from a state i to a state j can be obtained. In this case, a function V(y, i→j) takes the value 1 if the reception sequence y makes a transition from the state i to the state j; otherwise, the value 0.

In this case, the respective states are defined as follows:

I initial state S synchronous state U_(i) asynchronous state i = 1, . . ., N − 2 E error detection state

FIG. 55 shows an example of the state transition diagram of a code word. FIG. 56 shows a code word state transition table.

A matrix T is a portion, of the state transition table, which is obtained by excluding an error detection probability from each state and is defined as

$\begin{matrix} {T = {\begin{pmatrix} t_{11} & t_{12} & \cdots & t_{1N} \\ \vdots & \vdots & ⋰ & \vdots \\ t_{N1} & t_{N2} & \cdots & t_{NN} \end{pmatrix}.}} & (7) \end{matrix}$

Assume that a vector D is the probability of transition from each state to the error detection state E. D=(t _(1N+1) , t _(2N+1) , . . . , t _(NN+1))^(T)  (8)

Since a transition starts from the initial state I, the initial probability of each state excluding the error detection state E can be given by Q(0)=(1, 0, . . . 0)  (9) the probability of each state excluding the error detection state E after i code words can be calculated by Q(i)=Q(0)T ^(i−1)  (10)

The probability of detection of an error after i code words is therefore the probability detected next in each state after i−1 code words, and hence can be expressed as R(i)=Q(i−1)D=Q(0)T ^(i−1) D i=1, 2,  (11) where T⁰ is a unit matrix I.

When the estimated probability a is set, the number of code words from which errors can be detected with the set probability can be calculated.

$\begin{matrix} {a < {\sum\limits_{i = 1}^{j}\;{R(i)}}} & (12) \end{matrix}$ When F(a) is set by obtaining a minimum value of j, as expressed above, an error range can be estimated in terms of probability. F(a) corresponds to T in the first and second embodiments, as previously described.

That is, an error is present with the probability a in a range preceding an error detection position by F(a) code words. In addition, from the viewpoint of decode processing, with this value, a portion to which an error may have propagated can be removed with the probability a by retracing the code by F(a) code words from an error detection position.

The decode value determination unit 105 calculates a range F₁(a) in which an error is present in the forward direction and a range F₂(a) in which an error is present in the backward direction on the basis of a forward code word table 103, a backward decoder 108, the probability P(x) of occurrence of a code word, the error rate ε in the communication channel, and the estimated probability a, and determines a portion to be discarded in accordance with a relationship with the error detection positions.

If the error detection position in the forward direction and the error detection position in the backward direction do not cross each other as shown in FIG. 57A, the range to be discarded is increased by retracing the encoded data by the ranges F₁(a) and F₂(a) in which the errors are present.

If the error detection position in the forward direction and the error detection position in the backward direction cross each other and the crossing range is larger than the range in which the errors are present, as shown in FIG. 57B, the crossing range is determined as a range to be discarded.

If the error detection position in the forward direction and the error detection position in the backward direction cross each other and the crossing range is smaller than the error range in which the errors are present, as shown in FIG. 57C, the range in which the errors are present is determined as a range to be discarded.

In addition, an error range can be estimated from the number of bits by multiplying F(a) by an average code length.

$\begin{matrix} {{B(a)} = {{F(a)}{\sum\limits_{x \in X}^{\;}\;{{P(x)}1(x)}}}} & (13) \end{matrix}$

In this case, the decode value determination unit 105 operates in the manner shown in FIG. 58A, 58B, or 58C. If the error detection position in the forward direction and the error detection position in the backward direction do not cross each other as shown in FIG. 58A as in the case shown in FIG. 57A, 57B, or 57C, the range to be discarded is increased by retracing the encoded data by the ranges B₁(a) and B₂(a) in which the errors are present.

If the error detection position in the forward direction and the error detection position in the backward direction cross each other and the crossing range is larger than the range in which the errors are present, as shown in FIG. 58B, the crossing range is determined as a range to be discarded.

If the error detection position in the forward direction and the error detection position in the backward direction cross each other and the crossing range is smaller than the error range in which the errors are present, as shown in FIG. 58C, the range in which the errors are present is determined as a range to be discarded.

Although the third embodiment has exemplified the variable-length decoder capable of directional decoding, the present invention can also be applied to a variable-length decoder capable of only normal forward decoding.

As described above, in the variable-length decoding apparatus of the third embodiment, decode processing is performed in the following procedure: 1) decoding encoded data in the forward direction until detection of an error in the encoded data, 2) decoding the encoded data in the backward direction upon detection of an error in the encoded data in forward decoding, and 3) estimating a range in which the errors are present on the basis of the forward and backward decode results, the encoded data error detection positions respectively detected in the forward and backward decoding, the error rate in the transmission system or storage system, the occurrence probability of each code word, and the bit pattern of each code word in the code word table, thereby determining a final decode value.

As described above, the probability that an incorrect code word is erroneously decoded as a correct code word can be decreased to a predetermined probability or less by estimating the actual positions of errors from error detection positions in terms of probability in accordance with the error rate in the transmission system or storage system and the performance of code words.

Note that the procedures for decode processing performed by the variable-length decoding apparatuses of the first to third embodiments described above can be implemented by computer programs stored in recording media such as a computer readable CD-ROM, DVD-ROM, and DVD-RAM. Even a computer having no dedicated hardware for variable-length decoding can therefore perform decode processing with little influences of errors contained in encoded data. In addition, part or all of the hardware of the variable-length decoding apparatus according to each of the first to third embodiments can be mounted, and its operation control can be performed by computer programs.

(Fourth Embodiment)

An example of a video encoding/decoding system incorporating the variable-length encoding/decoding apparatus according to each of the first to third embodiments of the present invention will be described as an application of the present invention with reference to FIG. 59. The image signal input through a camera 1002 mounted on a personal computer (PC) 1001 is encoded by the video encoder or video encoding software incorporated in the PC 1001. The encoded data is multiplexed with other information such as speech information and data information. The resultant data is transmitted from a radio unit 1003 by radio and is received by another radio unit 1004. The signal received by the radio unit 1004 is demultiplexed into the encoded data of the image signal and the speech data. Of these data, the encoded data of the image signal is decoded by the video decoder or video decoding software incorporated in a workstation (EWS) 1005 and is displayed on the display of the EWS 1005.

The image signal input through a camera 1006 mounted on the EWS 1005 is encoded by the video encoder or encoding software incorporated in the EWS 1005 as in the above case. The encoded data is multiplexed with other information such as speech information and data information. The resultant data is transmitted from the radio unit 1004 by radio and is received by the radio unit 1003. The signal received by the radio unit 1003 is demultiplexed into the encoded data of the image signal and the speech information or data information. Of these data, the encoded data of the image signal is decoded by the video decoder or video decoding software incorporated in the PC 1001 and is displayed on the display of the PC 1001.

Note that the video decoding software is implemented by a program for causing the computer to execute the procedure for variable-length decode processing described in each of the above embodiments.

In addition, the arrangements of the first to third embodiments and the formats of encoded data sequences described above can be used in combination, as needed.

As has been described above, according to the present invention, there is provided a variable-length decoding apparatus and method, which can decrease the possibility of decoding an incorrect code word as a correct code word by using error detection positions in encoded data in units of bits and error detection positions in the encoded data in units of syntax, and can reduce the influences of channel errors. In addition, with the application of the variable-length decoding apparatus and method of the present invention to video decode processing, the influences of channel errors in the display frame can be reduced even when encoded video signals are transmitted through an environment including many channel errors such as a radio communication channel. Furthermore, the probability of decoding an incorrect code word as a correct code word can be further decreased by estimating an error propagation range.

INDUSTRIAL APPLICABILITY

The video decoding apparatus of the present invention described above is suited to decoding variable-length encoded video information or the like that is encoded into a reversible variable length code decodable in both forward and backward directions and recorded on a recording medium or transmitted. 

1. A variable-length decoding apparatus comprising: an input unit which receives encoded data formed from a variable length code made up of reversible code words configured to be decoded in both a forward direction and a backward direction; a forward decoder which decodes the encoded data in each predetermined section in the forward direction; a backward decoder which decodes the encoded data in each predetermined section in the backward direction; and a decode value determination unit which outputs a final decode result from decode results respectively obtained by said forward decoder and said backward decoder, wherein each of said forward and backward decoders includes a detection unit for detecting an error in the encoded data, and said decode value determination unit determines a decode value by using an error detection position in the decoded data in units of syntax which is detected by said forward decoder and indicates an error position in the encoded data, and an error detection position in units of syntax which is detected by said backward decoder and indicates an error position in the encoded data.
 2. A variable-length decoding apparatus according to claim 1, wherein said decode value determination unit uses, as the error detection position in the encoded data in units of syntax, an error detection position in units of code words which indicates which code word within a sync section of the encoded data has occurred the error.
 3. A variable-length decoding apparatus according to claim 1, wherein when the error detection positions obtained by said forward and backward decoders cross in units of bits or syntax, said decode value determination unit discards encoded data belonging to an area between the error detection positions in which a crossing amount is larger, and uses a forward decode result as a decode value for code words up to a position immediately before the discarded data area, and a backward decode result as a decode value for code words from a position immediately after the discarded data area.
 4. A variable-length decoding apparatus according to claim 1, wherein said decode value determination unit, (a) uses a forward decode result as a decode value for code words up to a position a predetermined amount before the error detection position in units of bits or syntax which is obtained by said forward decoder, and a backward decode result as a decode value for code words from a position a predetermined amount after the error detection position in units of bits or syntax which is obtained by said backward decoder, and discards the remaining encoded data when the error detection positions obtained by said forward and backward decoders do not cross each other in units of both bits and syntax, (b) uses a forward decode result as a decode value for code words up to a position immediately before the error detection position in units of syntax which is obtained by said backward decoder, and a backward decode result as a decode value for code words from a position immediately after the error detection position in units of syntax which is obtained by said forward decoder, and discards encoded data of a portion on which the error detection positions in units of syntax cross each other, when the error detection positions obtained by said forward and backward decoders do not cross each other in units of bits but cross each other in units of syntax, (c) uses a forward decode result as a decode value for code words up to a position immediately before the error detection position in units of bits which is obtained by said backward decoder, and a backward decode result as a decode value for code words from a position immediately after the error detection position in units of bits which is obtained by said forward decoder, and discards encoded data of a portion on which the error detection positions in units of bits cross each other, when the error detection positions obtained by said forward and backward decoders cross each other in units of bits but do not cross each other in units of syntax, and (d) selects a position where a crossing portion becomes largest as an error detection position, uses a forward decode result as a decode value for code words up to a position immediately before the error detection position obtained by said backward decoder and a backward decode result as a decode value for code words from a position immediately after the error detection position obtained by said forward decoder, and discards encoded data of a portion on which the error detection positions cross each other, when the error detection positions obtained by said forward and backward decoders cross each other in units of both bits and syntax.
 5. A variable-length decoding apparatus according to claim 1, wherein said decode value determination unit determines a decode value by using an error detection position in the encoded data in units of bits which is detected by said forward decoder and indicates an error position in the encoded data, and an error detection position in the encoded data in units of bits which is detected by said backward decoder and indicates an error position in the encoded data in addition to the error detection position in the decoded data in units of syntax which is detected by said forward decoder and indicates the error position in the encoded data, and the error detection position in units of syntax which is detected by said backward decoder and indicates the error position in the encoded data.
 6. A video decoding apparatus comprising: an input unit which receives encoded data of a video signal containing a variable length code generated by encoding transform coefficients obtained by orthogonal transformation of the video signal by using reversible code words configured to be decoded in both a forward direction and a backward direction; a sync section detection unit which detects a sync section of the encoded data; a forward decoder which decodes encoded data in the forward direction in a predetermined sync section detected by said sync section detection unit; a backward decoder which decodes encoded data in the backward direction in a predetermined sync section detected by said sync section detection unit; and a decode value determination unit which outputs a final decode result from decode results obtained by said forward and backward decoders, wherein each of said forward and backward decoders includes an error detection unit for detecting an error in the encoded data, and said decode value determination unit determines a decode value by using an error detection position in the encoded data in units of bits and an error detection position in the decoded data in units of syntax, which are detected by said forward decoder and indicate an error position in the encoded data, and an error detection position in the encoded data in units of bits and an error detection position in units of syntax, which are detected by said backward decoder and indicate an error position in the encoded data.
 7. A video decoding apparatus according to claim 6, wherein said decode value determination unit displays a previous frame for a macroblock from which encoded data is discarded or processes the macroblock in a mode without encoding when an intraframe encoding mode is set, and performs motion compensation when an interframe prediction encoding mode is set.
 8. A video decoding apparatus according to claim 6, wherein each encoded data in the sync section includes transform coefficients of a plurality of macroblocks as a unit in performing prediction encoding for a video signal, and said decode value determination unit uses, as the error detection position in the encoded data in units of syntax, an error detection position in units of macroblocks which indicates which macroblock within the sync section has occurred an error.
 9. A video decoding apparatus according to claim 6, wherein each encoded data in the sync section includes transform coefficients of a plurality of macroblocks as a unit in performing prediction encoding for a video signal, and said decode value determination unit, (a) uses a forward decode result as a decode value for macroblocks up to a position a predetermined amount before the error detection position in units of bits or syntax which is obtained by said forward decoder, and a backward decode result as a decode value for macroblocks from a position a predetermined amount after the error detection position in units of bits or syntax which is obtained by said backward decoder, and discards encoded data composed of transform coefficients of the remaining macroblocks, when the error detection positions obtained by said forward and backward decoders do not cross each other as both positions in units of bits and syntax, (b) uses a forward decode result as a decode value for macroblocks up to a position immediately before the error detection position in units of syntax which is obtained by said backward decoder, and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position in units of syntax which is obtained by said forward decoder, and discards encoded data composed of transform coefficients of a macroblock on which the error detection positions in units of syntax cross each other, when the error detection positions obtained by said forward and backward decoders do not cross each other as positions in units of bits but cross each other as positions in units of syntax, (c) uses a forward decoder result as a decode value for macroblocks up to a position immediately before the error detection position in units of bits which is obtained by said backward decoder, and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position in units of bits which is obtained by said forward decoder, and discards encoded data composed of transform coefficients of a macroblock on which the error detection positions in units of bits cross each other, when the error detection positions obtained by said forward and backward decoders cross each other as positions in units of bits but do not cross each other as positions in units of syntax, and (d) selects a position where a crossing portion becomes largest as an error detection position, uses a forward decode result as a decode value for macroblocks up to a position immediately before the error detection position obtained by said backward decoder and a backward decode result as a decode value for macroblocks from a position immediately after the error detection position obtained by said forward decoder, and discards encoded data composed of transform coefficients of a macroblock on which the error detection positions cross each other, when the error detection positions obtained by said forward and backward decoders cross each other as both positions in units of bits and syntax.
 10. A video decoding apparatus according to claim 9, wherein said decode value determination unit displays a previous frame for a macroblock from which encoded data is discarded or processes the macroblock in a mode without encoding when an intraframe encoding mode is set, and performs motion compensation when an interframe prediction encoding mode is set. 